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Ian Kuon, Jonathan Rose (Beteiligte)

Quantifying and Exploring the Gap Between FPGAs and ASICs


2010. 2014. xi, 180 S. 51 Tabellen. 235 mm
Verlag/Jahr: SPRINGER, BERLIN; SPRINGER US; SPRINGER 2014
ISBN: 1-489-98509-3 (1489985093)
Neue ISBN: 978-1-489-98509-5 (9781489985095)

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The differences between FPGA and ASIC technologies are examined in this reference, with a particular focus on cost, performance and power consumption. Common misconceptions between the two devices are addressed and specific design choices are highlighted.
Field-programmable gate arrays (FPGAs), which are pre-fabricated, programmable digital integrated circuits (ICs), provide easy access to state-of-the-art integrated circuit process technology, and in doing so, democratize this technology of our time. This book is about comparing the qualities of FPGA - their speed performance, area and power consumption, against custom-fabricated ICs, and exploring ways of mitigating their de ciencies. This work began as a question that many have asked, and few had the resources to answer - how much worse is an FPGA compared to a custom-designed chip? As we dealt with that question, we found that it was far more dif cult to answer than we anticipated, but that the results were rich basic insights on fundamental understandings of FPGA architecture. It also encouraged us to nd ways to leverage those insights to seek ways to make FPGA technology better, which is what the second half of the book is about. While the question "How much worse is an FPGA than an ASIC?" has been a constant sub-theme of all research on FPGAs, it was posed most directly, some time around May 2004, by Professor Abbas El Gamal from Stanford University to us - he was working on a 3D FPGA, and was wondering if any real measurements had been made in this kind of comparison. Shortly thereafter we took it up and tried to answer in a serious way.
Background.- Measuring the Gap.- Automated Transistor Sizing for FPGAs.- Navigating the Gap Using Architecture and Process Technology Scaling.- Navigating the Gap using Transistor Sizing.- Conclusions and FutureWork.