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Carry Select Adder is designed using parallel prefix adder namely Han-Carlson Adder. Instead of using Brent-Kung Adder to build a Carry Select Adder, Han-Carlson Adder is used in a Carry Select Adder. Adders are the important building block of any arithmetic and logic circuits. Brent-Kung Adder is a parallel prefix adder that is most commonly used in many processors. The main drawback in Brent-Kung Adder is that it use longer computation time. To overcome this drawback 16-bit Han-Carlson Adder is used. The area, power and delay of Brent-Kung Carry Select Adder and Han-Carlson Carry Select Adder are compared. The comparison explains that the Han-Carlson Carry Select Adder is of high speed when compared to the Brent-Kung Carry Select Adder. The design is implemented using CADENCE tool in digital methodology at 45nm technology.

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Subramaniam, Sivaganesan
Sivaganesan S Received B.E in Electronics and Communication Engineering from VSB Engineering College, Karur and M.E in VLSI Design from Karpagam College of Engineering, Coimbatore, Presently Working as Assistant Professor in KIT-Kalaignarkarunanidhi Institute of Technology, Coimbatore. Published more number of papers in International level Journals

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